Virtual memory refers to a technique that is used within many modern computer systems to provide more usable memory to application programs. Each application program operates as if it has access to a large portion of continuous computer memory, e.g., random access memory (RAM). This means that the physical memory used by an application program may be fragmented and/or overflow onto disk storage. The application program, however, acts as if it is accessing a continuous collection of memory addresses. Virtual memory also allows each executing application program to function as if it has access to the entirety of the physical memory of the host computer at any given time, despite having access to only a portion of the physical memory.
Implementation of virtual memory requires hardware components that aid the central processing unit (CPU) in translating virtual memory addresses (virtual addresses) utilized by the application program into physical memory addresses (physical addresses) used by the hardware to read and write to memory on behalf of the application program. A memory management unit (MMU) is a portion of hardware or circuitry that is tasked with translating virtual addresses to physical addresses. The MMU handles memory accesses that are requested by the CPU.
A translation look-aside buffer (TLB) is a cache that is used by the memory management hardware in serving memory access requests from the CPU. The TLB is incorporated to improve the speed of virtual address translation. The TLB includes a plurality of entries that map virtual addresses onto physical addresses. A TLB generally is implemented using a content addressable memory (CAM). Unlike a RAM where a memory address is supplied, a CAM receives a virtual address and searches the entire CAM contents for the virtual address. If an entry matches the virtual address, the physical address onto which the virtual address is mapped, as specified in the entry, is returned or output. If the specified virtual address is not found within the CAM, an exception can be generated which causes the virtual address to be looked up using another resource, e.g., a page table.
Programmable integrated circuits (ICs) are a well-known type of IC that can be programmed to perform specified logic functions. One type of programmable IC, the field programmable gate array (FPGA), typically includes an array of programmable tiles. These programmable tiles can include, for example, input/output blocks (IOBs), configurable logic blocks (CLBs), dedicated random access memory blocks (BRAM), multipliers, digital signal processing blocks (DSPs), processors, clock managers, delay locked loops (DLLs), and so forth.
Each programmable tile typically includes both programmable interconnect and programmable logic. The programmable interconnect typically includes a large number of interconnect lines of varying lengths interconnected by programmable interconnect points (PIPs). The programmable logic implements the logic of a user design using programmable elements that can include, for example, function generators, registers, arithmetic logic, and so forth.
The programmable interconnect and programmable logic are typically programmed by loading a stream of configuration data into internal configuration memory cells that define how the programmable elements are configured. The configuration data can be read from memory (e.g., from an external PROM) or written into the FPGA by an external device. The collective states of the individual memory cells then determine the function of the FPGA.
Another type of programmable IC is the Complex Programmable Logic Device, or CPLD. A CPLD includes two or more “function blocks” connected together and to input/output (I/O) resources by an interconnect switch matrix. Each function block of the CPLD includes a two-level AND/OR structure similar to those used in Programmable Logic Arrays (PLAs) and Programmable Array Logic (PAL) devices. In CPLDs, configuration data is typically stored on-chip in non-volatile memory. In some CPLDs, configuration data is stored on-chip in non-volatile memory, then downloaded to volatile memory as part of an initial configuration (programming) sequence.
For all of these programmable ICs, the functionality of the device is controlled by data bits provided to the device for that purpose. The data bits can be stored in volatile memory (e.g., static memory cells, as in FPGAs and some CPLDs), in non-volatile memory (e.g., FLASH memory, as in some CPLDs), or in any other type of memory cell.
Other programmable ICs are programmed by applying a processing layer, such as a metal layer, that programmatically interconnects the various elements on the device. These programmable ICs are known as mask programmable devices. Programmable ICs can also be implemented in other ways, e.g., using fuse or antifuse technology. The phrase “programmable IC” includes but is not limited to these exemplary devices, as well as encompassing devices that are only partially programmable. For example, one type of programmable IC includes a combination of hard-coded transistor logic and a programmable switch fabric that programmatically interconnects the hard-coded transistor logic.
While CAMs may be used within application specific integrated circuits (ASICs), CAMs generally are not available within programmable ICs. Further, when implementing soft processors within a programmable IC, e.g., a processor formed by programming the fabric of the programmable IC to implement a CPU, a CAM is not an available option for implementing a TLB for that processor.